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HS-3000 bảng dữ liệu(PDF) 38 Page - BOSER Technology Co., Ltd |
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HS-3000 bảng dữ liệu(HTML) 38 Page - BOSER Technology Co., Ltd |
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38 / 46 page ![]() 32 4.6 Advanced Chipset Setup This section allows you to configure the system based on the specific features of the installed chipset. This chipset manages bus speeds and the access to the system memory resources, such as DRAM and the external cache. It also coordinates the communications between the conventional ISA and PCI buses. It must be stated that these items should never be altered. The default settings have been chosen because they provide the best operating conditions for your system. You might consider and make any changes only if you discover that the data has been lost while using your system. AMIBIOS SETUP – ADVANCED CHIPSET SETUP (C)1999 American Megatrends, Inc. All Rights Reserved Available Options: AT Bus Clock 14.318/2 Disabled Slow Refresh (us) 120 Enabled Memory Hole At 15-16M Disabled RAS Precharge time 3.5T RAS Active Time Insert Wait Enabled CAS Precharge Time Insert Wait Enabled Memory Write Insert Wait Enabled Memory Miss Read Insert Wait Enabled ISA Write cycle end Insert Wait Enabled I/O Recovery Enabled I/O Recovery Period 0.75 us On-Chip I/O Recovery Disabled 16Bit ISA Insert Wait Enabled ESC:Exit :Sel PgUp/PgDn: Modify F1:Help F2/F3:Color |
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