TUSB3200 datasheet(88/93 Pages) TI

88 / 93 page

A–40

A.5.7

Miscellaneous Registers

This section describes the memory-mapped registers used for the control and operation of miscellaneous functions

in the TUSB3200 device. The registers include the USB out endpoint interrupt register, the USB in endpoint interrupt

A.5.7.1 USB Out Endpoint Interrupt Register (OEPINT – Address FFB4h)

The USB out endpoint interrupt register contains the interrupt pending status bits for the USB out endpoints. These

bits do not apply to the USB isochronous endpoints. Also, these bits are read only by the MCU and are used for

diagnostic purposes only.

Bit

Mnemonic

OEPI7

OEPI6

OEPI5

OEPI4

OEPI3

OEPI2

OEPI1

OEPI0

Type

Default

BIT

MNEMONIC

NAME

DESCRIPTION

7:0

OEPI(7:0)

Out endpoint interrupt

The out endpoint interrupt status bit for a particular USB out endpoint is set to a 1 by

the UBM when a successful completion of a transaction occurs to that out endpoint.

When a bit is set, an interrupt to the MCU will be generated and the corresponding

interrupt vector will result. The status bit will be cleared when the MCU writes to the

interrupt vector register. These bits do not apply to isochronous out endpoints.

A.5.7.2 USB In Endpoint Interrupt Register (IEPINT – Address FFB3h)

The USB in endpoint interrupt register contains the interrupt pending status bits for the USB in endpoints. These bits

do not apply to the USB isochronous endpoints. Also, these bits are read only by the MCU and are used for diagnostic

purposes only.

Bit

Mnemonic

IEPI7

IEPI6

IEPI5

IEPI4

IEPI3

IEPI2

IEPI1

IEPI0

Type

Default

BIT

MNEMONIC

NAME

DESCRIPTION

7:0

IEPI(7:0)

In endpoint interrupt

The in endpoint interrupt status bit for a particular USB in endpoint is set to a 1 by the

UBM when a successful completion of a transaction occurs to that in endpoint.

When a bit is set, an interrupt to the MCU will be generated and the corresponding

interrupt vector will result. The status bit will be cleared when the MCU writes to the

interrupt vector register. These bits do not apply to isochronous in endpoints.

TUSB3200 bảng dữ liệu(PDF) 88 Page - Texas Instruments

TUSB3200 bảng dữ liệu(HTML) 88 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93

bảng dữ liệu tải về

Link URL