TUSB3200 datasheet(85/93 Pages) TI

85 / 93 page

A–37

A.5.5.2 I2C Interface Receive Data Register (I2CDATI – Address FFC2h)

The I2C interface receive data register contains the most recent data byte received from the slave device.

Bit

Mnemonic

RXD7

RXD6

RXD5

RXD4

RXD3

RXD2

RXD1

RXD0

Type

Default

BIT

MNEMONIC

NAME

DESCRIPTION

7:0

RXD(7:0)

Receive data

The receive data byte value is updated by hardware for each data byte received from

the I2C slave device.

A.5.5.3 I2C Interface Transmit Data Register (I2CDATO – Address FFC1h)

The I2C interface transmit data register contains the next address or data byte to be transmitted to the slave device

in accordance with the protocol. Note that for both read and write transactions, the internal register or memory

address of the slave device being accessed must be transmitted to the slave device.

Bit

Mnemonic

TXD7

TXD6

TXD5

TXD4

TXD3

TXD2

TXD1

TXD0

Type

Default

BIT

MNEMONIC

NAME

DESCRIPTION

7:0

TXD(7:0)

Transmit data

The transmit data byte value is set by the MCU for each address or data byte to be

transmitted to the I2C slave device.

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