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TMS320F241FN bảng dữ liệu(PDF) 77 Page - Texas Instruments |
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TMS320F241FN bảng dữ liệu(HTML) 77 Page - Texas Instruments |
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77 / 116 page ![]() TMS320F243, TMS320F241 DSP CONTROLLERS SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999 77 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 CLOCK CHARACTERISTICS AND TIMINGS clock options PARAMETER PLL multiply-by-4 The ’F243/’F241 devices include an on-chip PLL which is hardwired for multiply-by-4 operation. This requires the use of a 5-MHz clock input frequency for 20-MHz device operation. This input clock can be provided from either an external reference crystal or oscillator. external reference crystal clock option The internal oscillator is enabled by connecting a crystal across XTAL1/CLKIN and XTAL2 pins as shown in Figure 20a. The crystal should be in fundamental operation and parallel resonant, with an effective series resistance of 30 Ω and a power dissipation of 1 mW; it should be specified at a load capacitance of 20 pF. external reference oscillator clock option The internal oscillator is disabled by connecting a TTL-level clock signal to XTAL1/CLKIN and leaving the XTAL2 input pin unconnected as shown in Figure 20b. External Clock Signal (toggling 0 – 5 V) C2 (see Note A) C1 (see Note A) Crystal XTAL2 XTAL1/CLKIN XTAL1/CLKIN XTAL2 NC NOTE A: For the values of C1 and C2, see the crystal manufacturer’s specification. (a) (b) Figure 20. Recommended Crystal / Clock Connection |
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