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M68HC08 bảng dữ liệu(PDF) 97 Page - Freescale Semiconductor, Inc |
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M68HC08 bảng dữ liệu(HTML) 97 Page - Freescale Semiconductor, Inc |
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97 / 188 page ![]() Keyboard/External Interrupt Module (KBI) Functional Description MC68HC908RF2 — Rev. 4.0 Data Sheet MOTOROLA Keyboard/External Interrupt Module (KBI) 97 Figure 7-4. IRQ Interrupt Flowchart If the MODEI bit is clear, the IRQ pin is falling-edge sensitive only. With MODEI clear, a vector fetch or software clear immediately clears the IRQ1 latch.The IRQ1F bit in the INTKBSCR register can be used to check for pending interrupts. The IRQ1F bit is not affected by the IMASKI bit, which makes it useful in applications where polling is preferred. Use the BIH or BIL instruction to read the logic level on the IRQ pin. NOTE: When using the level-sensitive interrupt trigger, avoid false interrupts by masking interrupt requests in the interrupt routine. FROM RESET I BIT SET? FETCH NEXT YES NO INTERRUPT? INSTRUCTION SWI INSTRUCTION? RTI INSTRUCTION? NO STACK CPU REGISTERS NO SET I BIT LOAD PC WITH INTERRUPT VECTOR NO YES UNSTACK CPU REGISTERS EXECUTE INSTRUCTION YES YES Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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