MSP430F2002IPW datasheet(60/88 Pages) TI

60 / 88 page

MSP430x20x1, MSP430x20x2, MSP430x20x3

MIXED SIGNAL MICROCONTROLLER

SLAS491D -- AUGUST 2005 -- REVISED SEPTEMBER 2007

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Port P1 (P1.3) pin schematics, MSP430x20x2

Bus

Keeper

Direction

0: Input

1: Output

P1SEL.3

P1DIR.3

P1IN.3

P1IRQ.3

Module X IN

Module X OUT

P1OUT.3

Interrupt

Edge

Select

Set

P1SEL.3

P1IES.3

P1IFG.3

P1IE.3

P1.3/ADC10CLK/

A3/VREF--/VeREF--

DVSS

DVCC

P1REN.3

ADC10AE.3

To ADC 10 V

Pad Logic

INCHx = 3

R--

SREF2

VSS

Port P1 (P1.0 to P1.3) pin functions, MSP430x20x2

PIN NAME (P1 X)

FUNCTION

CONTROL BITS / SIGNALS

PIN NAME (P1.X)

FUNCTION

P1DIR.x

P1SEL.x

ADC10AE.x

INCHx

P1.3/ADC10CLK/

3 P1.3† Input/Output

0/1

N/A

A3/VREF--/VeREF--

N/A

ADC10CLK

N/A

A3 (see Note 3)

VREF--/VeREF-- (see Notes 3, 4)

N/A

† Default after reset (PUC/POR)

NOTES: 1. N/A: Not available or not applicable.

2. X: Don’t care.

3. Setting the ADC10AE.x bit disables the output driver as well as the input schmitt trigger to prevent parasitic cross currents when

applying analog signals.

4. An applied voltage is used as negative reference if bit SREF3 in register ADC10CTL0 is set.

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