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CDCE62005 bảng dữ liệu(PDF) 23 Page - Texas Instruments |
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CDCE62005 bảng dữ liệu(HTML) 23 Page - Texas Instruments |
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23 / 76 page ![]() INTERFACE AND CONTROL BLOCK Interface & Control REF_SELECT /Power_Down /SYNC EEPROM(DefaultConfiguration) Device Hardware SPI_LE SPI_CLK SPI_MISO SPI_MOSI Register0 StaticRAM(DeviceRegisters) Register1 Register2 Register3 Register4 Register5 Register6 Register7 Register8 Register0 Register1 Register2 Register3 Register4 Register5 Register6 Register7 SPI (Serial Peripheral Interface) CDCE62005 www.ti.com........................................................................................................................................................................................... SCAS862 – NOVEMBER 2008 The Interface & Control Block includes a SPI interface, four control pins, a non-volatile memory array in which the device stores default configuration data, and an array of device registers implemented in Static RAM. This RAM, also called the device registers, configures all hardware within the CDCE62005. Figure 18. CDCE62005 Interface and Control Block The serial interface of CDCE62005 is a simple bidirectional SPI interface for writing and reading to and from the device registers. It implements a low speed serial communications link in a master/slave topology in which the CDCE62005 is a slave. The SPI consists of four signals: • SPI_CLK: Serial Clock (Output from Master) – the CDCE62005 clocks data in and out on the rising edge of SPI_CLK. Data transitions therefore occur on the falling edge of the clock. • SPI_MOSI: Master Output Slave Input (Output from Master) . • SPI_MISO: Master Input Slave Output (Output from Slave) • SPI_LE: Latch Enable (Output from Master). The falling edge of SPI_LE initiates a transfer. If SPI_LE is high, no data transfer can take place. The CDCE62005 implements data fields that are 28-bits wide. In addition, it contains 9 registers, each comprising a 28 bit data field. Therefore, accessing the CDCE62005 requires that the host program append a 4-bit address field to the front of the data field as follows: Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s) :CDCE62005 |
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