HD64F2144B datasheet(56/546 Pages) RENESAS

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Section 2 CPU

Rev. 1.00 Jun.24, 2005 Page 24 of 510

REJ09B0241-0100

2.2.2

Advanced Mode

• Address space

Linear access to a maximum address space of 16 Mbytes is possible.

• Extended registers (En)

The extended registers (E0 to E7) can be used as 16-bit registers. They can also be used as the

upper 16-bit segments of 32-bit registers or address registers.

• Instruction set

All instructions and addressing modes can be used.

• Exception vector table and memory indirect branch addresses

In advanced mode, the top area starting at H'00000000 is allocated to the exception vector

table in 32-bit units. In each 32 bits, the upper 8 bits are ignored and a branch address is stored

in the lower 24 bits (see figure 2.3). For details on the exception vector table, see section 4,

Exception Handling.

H'00000000

H'00000003

H'00000004

H'0000000B

H'0000000C

H'00000010

H'00000008

H'00000007

Reserved

Reset exception vector

(Reserved for system use)

Exception vector table

Exception vector 1

(Reserved for system use)

Figure 2.3 Exception Vector Table (Advanced Mode)

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