7721 datasheet(245/577 Pages) RENESAS

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SERIAL I/O

7721 Group User’s Manual

11–42

11.4 Clock asynchronous serial I/O (UART) mode

Fig. 11.4.9 Initial setting example for relevant registers when receiving

Reception starts when the start

bit is detected.

UART0 baud rate register (BRG0) (Address 3116)

UART1 baud rate register (BRG1) (Address 3916)

Can be set to 0016 to FF16.

UART0 receive interrupt control register (Address 7216)

UART1 receive interrupt control register (Address 7416)

Interrupt priority level select bits

When using interrupts, set these bits to

one of levels 1 to 7.

When disabling interrupts, set these bits

to level 0.

Note: Set the transfer data format in

the same way as set on the

transmitter side.

UART0 transmit/receive control register 1 (Address 3516)

UART1 transmit/receive control register 1 (Address 3D16)

Receive enable bit

1: Reception enabled

UART0 transmit/receive mode register (Address 3016)

UART1 transmit/receive mode register (Address 3816)

Internal/External clock select bit

0: Internal clock

1: External clock

1 0 0: UART mode (7 bits)

1 0 1: UART mode (8 bits)

1 1 0: UART mode (9 bits)

Stop bit length select bit

0: 1 stop bit

1: 2 stop bits

Odd/Even parity select bit

0: Odd parity

1: Even parity

Parity enable bit

0: Parity disabled

1: Parity enabled

Sleep select bit

0: Sleep mode terminated (Invalid)

1: Sleep mode selected

b2b1b0

UART0 transmit/receive control register 0 (Address 34

)

UART1 transmit/receive control register 0 (Address 3C )

BRG count source select bits

CTS

/RTS select bit

0 : CTS function selected

1 : RTS function selected

0 0 : f2

0 1 : f16

1 0 : f64

1 1 : f512

b1b0

Port P8 direction register (Address 1416)

RxD0 pin

RxD1 pin

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