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SERIAL I/O

7721 Group User’s Manual

11–46

11.4 Clock asynchronous serial I/O (UART) mode

11.4.7 Processing on detecting error

In the UART mode, 3 types of errors can be detected. Each error can be detected when the data in the

UARTi receive register is transferred to the UARTi receive buffer register, and the corresponding error flag

is set to “1.” When any error occurs, the error sum flag is set to “1.” Accordingly, presence of errors can

be judged by using the error sum flag.

Table 11.4.6 lists conditions for setting each error flag to “1” and method for clearing it to “0.”

Table 11.4.6 Conditions set to “1” and method cleared to “0” for each error flag

Method for being cleared to “0”

•Clear the serial I/O mode select bits to

“0002.”

•Clear the receive enable bit to “0.”

•Clear the serial I/O mode select bits to

“0002.”

•Clear the receive enable bit to “0.”

•Read out the low-order byte of the UARTi

receive buffer register.

•Clear the serial I/O mode select bits to

“0002.”

•Clear the receive enable bit to “0.”

•Read out the low-order byte of the UARTi

receive buffer register.

•Clear the all error flags, which are overrun,

framing and parity error flags.

Error flag

Overrun error flag

Framing error flag

Parity error flag

Error sum flag

Conditions for being set to “1”

When the next data is prepared in the

UARTi receive register with the receive

complete flag = “1” (i.e., data is present

in the UARTi receive buffer register). In

other words, when the next data is

prepared before the contents of the UARTi

receive buffer register are read out. (Note)

[UARTi receive interrupt request bit is not

changed.]

When the number of detected stop bits

does not match the set number of stop

bits.

[UARTi receive interrupt request bit is set

to “1.”]

When the sum of “1”s in the parity bit

and character bits does not match the

set number of “1”s.

[UARTi receive interrupt request bit is set

to “1.”]

When 1 or more errors listed above occur.

Note: The next data is written into the UARTi receive buffer register.

When an error occurs during reception, initialize the error flag and the UARTi receive buffer register, and

then perform reception again. When it is necessary to perform retransmission owing to an error which occurs

in the receiver side during transmission, set the UARTi transmit buffer register again, and then restarts

transmission.

The method of initializing the UARTi receive buffer register and that of setting the UARTi transmit buffer

(1)

Method of initializing UARTi receive buffer register

Clear the receive enable bit to “0” (reception disabled).

Set the receive enable bit to “1” again (reception enabled).

(2)

Method of setting UARTi transmit buffer register again

Clear the serial I/O mode select bits to “0002” (serial I/O invalid).

Set the serial I/O mode select bits again.

Set the transmit enable bit to “1” (transmission enabled), and set the transmit data to the UARTi

transmit buffer register.

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