7220 datasheet(196/303 Pages) RENESAS

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5.4 Example of I2C-BUS interface control (M37221Mx-XXXSP/FP)

5-23

7220 Group User’s Manual

5.4.4 General flowchart

The processing routines which controls I2C-BUS devices branch to the write processing routine and the

read processing routine. The data output processing routine is used as the common processing routine.

(1)

Write processing routine

Fig. 5.4.4 Flowchart of write processing routine

Disable multi-master I 2C-BUS interface interrupt.

Transmit the START condition and slave address (W).

Transmit sub-address and data.

Note 1: Refer to “(3) Data output processing

routine.”

Transmit the STOP condition.

Note 2: Be sure to set between S1 and S1 within

10 machine cycles.

Setting for outputting the START condition

in data output processing routine.

Write start

Initialization

S2 (address 00DB 16)

S1D (address 00DA 16)

IICE (bit6 at address 00FE 16)

S1 (address 00D9 16)

End

S1 (address 00F8 16)

Slave address (W) “A0 16”

Data output

“110001012”

“010010002”

“0”

“000100002”

“1”

“110000002”

“110100002”

“0”

S1:

S2:

S1D:

IICE:

BB:

Accumulator

I2C status register

I2C clock control register

I2C control register

Multi-master I 2C interface interrupt

enable bit

Bit 5 of I2C status register

Within 10

machine

cycles

Slave address

(W) “A016”

Sub-address

Data

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