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7220 bảng dữ liệu(PDF) 195 Page - Renesas Technology Corp |
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7220 bảng dữ liệu(HTML) 195 Page - Renesas Technology Corp |
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195 / 303 page ![]() APPLICATION 5.4 Example of I2C-BUS interface control (M37221Mx-XXXSP/FP) 7220 Group User’s Manual 5-22 5.4.3 E2PROM functions (1) Byte write Bytes are written by sending the START condition, slave address “A016,” sub-address (1 byte), data (1 byte), and the STOP condition from the master. Writing to the E2PROM will be started after the master sends the STOP condition, that is, in synchronization with a rising edge of the SDA signal. This writing will be automatically terminated by the on-chip sequential controller. In this period, no acknowledge bits are generated. Figure 5.4.2 shows the byte write timing. Fig. 5.4.2 Byte write timing Bus operation of master side: SDA signal S P Slave address (W) Sub-address (n) Data (n) S T A R T A C K A C K S T O P Bus operation of slave side: : START condition : STOP condition : Acknowledge bit : Write bit (0) S P ACK W W (2) Random address read In this mode, the data of an arbitrary address is read. To set the first-read address, the master sends the START condition, slave address “A016,” and sub-address (1 byte). Upon receiving the acknowledge bit (ACK) from the E2PROM, the master sends the RESTART condition signal and slave address “A116” again. After ACK is generated from the E2PROM, the data of the corresponding sub-address is read out. After the data is output, no acknowledge bits are generated, but the STOP condition is sent by the master, completing this read operation. Fig. 5.4.3 Random address read timing S P Data (n) S T A R T A C K S T O P A C K A C K S S T A R T Bus operation of master side: SDA signal Bus operation of slave side: : START condition : STOP condition : Acknowledge bit : Write bit (0) S P ACK W Slave address (W) Sub-address (n) Slave address (R) W R R : Read bit (1) : RESTART condition : No acknowledge bit R RS NACK A C K N A C K |
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