SH7721 datasheet(209/1524 Pages) RENESAS

tên linh kiện	SH7721

Giải thích chi tiết về linh kiện	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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Section 3 DSP Operating Unit

Rev. 3.00 Jan. 18, 2008 Page 147 of 1458

REJ09B0033-0300

3.5.12

Local Data Move Instruction

The DSP unit of this LSI provides additional two independent registers, MACL and MACH, in

order to support CPU standard multiply/MAC operations. They can be also used as temporary

storage registers by local data move instructions between MACH/L and other DSP registers.

Figure 3.22 shows the flow of seven local data move instructions. Table 3.33 shows the variation

of this type of instruction.

PLDS

PSTS

Cannot be used

MACH

MACL

A0G

A1G

DSR

Figure 3.22 Local Data Move Instruction Flow

Table 3.33

Variation of Local Data Move Operations

Mnemonic

Function

Operand

PLDS

Data move from DSP register to MACL/MACH

PSTS

Data move from MACL/MACH to DSP register

This instruction is very similar to other transfer instructions. If either the A0 or A1 register is

specified as the destination operand of PSTS, the signed bit is sign-extended and copied into the

corresponding guard-bit parts, A0G or A1G. The DC bit in DSR and other condition code bits are

not updated regardless of the instruction result. This instruction can operate as a conditional. This

instruction can operate with MOVX and MOVY in parallel.

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