SH7721 datasheet(492/1524 Pages) RENESAS

tên linh kiện	SH7721

Giải thích chi tiết về linh kiện	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

Scroll/Zoom	100%

nhà sản xuất	RENESAS [Renesas Technology Corp]

Trang chủ	http://www.renesas.com

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492 / 1524 page

Section 10

Direct Memory Access Controller (DMAC)

Rev. 3.00 Jan. 18, 2008 Page 430 of 1458

REJ09B0033-0300

CHCR

DMARS

RS[3:0]

MID

RID

DMA Transfer

Request

Source

DMA Transfer

Request Signal

Source

Destination

Bus

Mode

USBF

transmitter

Transmit data empty request Any

EPDR2

Cycle

steal

100000

USBF receiver Transmit data full request

EPDR1

Any

Cycle

steal

SIM

transmitter

TXI (transmit data empty)

Any

SCTDR

Cycle

steal

101000

SIM receiver

RXI (receive data full)

SCRDR

Any

Cycle

steal

MMC

transmitter

Receive data empty request

Any

Data register Cycle

steal

101010

MMC receiver Receive data full request

Data register

Any

Cycle

steal

SIOF0

transmitter

TXI0 (transmit FIFO data

empty)

Any

SITDR0

Cycle

steal

101100

SIOF0

receiver

RXI0 (receive FIFO data full) SIRDR0

Any

Cycle

steal

SIOF1

transmitter

TXI1 (transmit FIFO data

empty)

Any

SITDR1

Cycle

steal

101101

SIOF1

receiver

RXI1 (receive FIFO data full) SIRDR0

Any

Cycle

steal

SD transmitter Transmit data empty request Any

Data register Cycle

steal

1000

110000

SD receiver

Receive data full request

Data register

Any

Cycle

steal

1110



ADC

ADI (A/D conversion end)

ADDR

Any

Cycle

steal

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