SH7713 datasheet(164/904 Pages) RENESAS

164 / 904 page

Section 3 DSP Operating Unit

Rev.1.50 Aug. 30, 2006 Page 124 of 860

REJ09B0288-0150

Table 3.23

Variation of ALU Integer Operations

Mnemonic

Function

Source 1

Source 2

Destination

PINC

Increment by 1

–1

PDEC

Decrement by 1

–1

Note:

The ALU integer operations are basically 24-bit operation, the upper 16 bits of the base

precision and 8 bits of the guard-bits parts. So the signed bit is copied to the guard-bit parts

when a register not providing the guard-bit parts is specified as the source operand. When

a register not providing the guard-bit parts is specified as a destination operand, the upper

word excluding the guard bits of the operation result are input into the destination register.

In ALU integer arithmetic operations, the lower word of the source operand is ignored and the

lower word of the destination operand is automatically cleared. The guard-bit parts are effective in

integer arithmetic operations if they are supported. Others are basically the same operation as

ALU fixed-point arithmetic operations. As shown in table 3.23, however, this type of operation

provides two kinds of instructions only, so that the second operand is actually either +1 or –1.

When a word data is loaded into one of the DSP unit’s registers, it is input as an upper word data.

When a register providing guard bits is specified as an operand, the guard bits are also activated.

These operations, as well as fixed-point operations, are executed in the DSP stage, as shown in

figure 3.10. The DSP stage is the same stage as the MA stage in which memory access is

performed.

Every time an ALU arithmetic operation is executed, the DC, N, Z, V, and GT bits in DSR are

basically updated in accordance with the operation result. This is the same as fixed-point

operations but the lower word of each source and destination operand is not used in order to

generate them. See section 3.5.4, ALU Fixed-Point Operations, for details.

In case of a conditional operation, they are not updated even though the specified condition is true

and the operation is executed. In case of an unconditional operation, they are always updated in

accordance with the operation result. See section 3.5.4, ALU Fixed-Point Operations, for details.

• Overflow Protection

The S bit in SR is effective for any ALU integer arithmetic operations in DSP unit. See section

3.5.11, Overflow Protection, for details.

SH7713 bảng dữ liệu(PDF) 164 Page - Renesas Technology Corp

SH7713 bảng dữ liệu(HTML) 164 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL