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SH7243 bảng dữ liệu(PDF) 10 Page - Renesas Technology Corp

tên linh kiện SH7243
Giải thích chi tiết về linh kiện  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
PDF  1726 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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SH7243 bảng dữ liệu(HTML) 10 Page - Renesas Technology Corp

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Rev. 1.00 Jun. 26, 2008 Page x of xxx
3.3.1
Mode 0 (MCU Extension Mode 0) ..................................................................... 64
3.3.2
Mode 1 (MCU Extension Mode 1) ..................................................................... 64
3.3.3
Mode 2 (MCU Extension Mode 2) ..................................................................... 64
3.3.4
Mode 3 (Single Chip Mode) ............................................................................... 64
3.4
Address Map....................................................................................................................... 65
3.5
Initial State in This LSI.......................................................................................................72
3.6
Note on Changing Operating Mode.................................................................................... 72
Section 4 Clock Pulse Generator (CPG) ............................................................... 73
4.1
Features............................................................................................................................... 73
4.2
Input/Output Pins................................................................................................................ 77
4.3
Clock Operating Modes ...................................................................................................... 78
4.4
Register Descriptions.......................................................................................................... 81
4.4.1
Frequency Control Register (FRQCR) ............................................................... 81
4.4.2
MTU2S Clock Frequency Control Register (MCLKCR) ................................... 84
4.4.3
AD Clock Frequency Control Register (ACLKCR) ........................................... 85
4.4.4
Oscillation Stop Detection Control Register (OSCCR) ...................................... 86
4.5
Changing the Frequency ..................................................................................................... 87
4.6
Oscillator ............................................................................................................................ 88
4.6.1
Connecting Crystal Resonator ............................................................................ 88
4.6.2
External Clock Input Method.............................................................................. 89
4.7
Oscillation Stop Detection .................................................................................................. 90
4.8
USB Operating Clock (48 MHz) ........................................................................................ 91
4.8.1
Connecting a Ceramic Resonator........................................................................ 91
4.8.2
Input of an External 48-MHz Clock Signal ........................................................ 92
4.8.3
Handling of pins when a Ceramic Resonator is not Connected
(the Internal CPG is Selected or the USB is Not in Use) .................................... 93
4.9
Notes on Board Design ....................................................................................................... 94
4.9.1
Note on Using an External Crystal Resonator .................................................... 94
Section 5 Exception Handling ............................................................................... 95
5.1
Overview ............................................................................................................................ 95
5.1.1
Types of Exception Handling and Priority ......................................................... 95
5.1.2
Exception Handling Operations.......................................................................... 97
5.1.3
Exception Handling Vector Table ...................................................................... 99
5.2
Resets................................................................................................................................ 101
5.2.1
Types of Reset .................................................................................................. 101
5.2.2
Power-On Reset ................................................................................................ 102
5.2.3
Manual Reset .................................................................................................... 104



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