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M16C/62 bảng dữ liệu(PDF) 156 Page - Renesas Technology Corp |
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M16C/62 bảng dữ liệu(HTML) 156 Page - Renesas Technology Corp |
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156 / 621 page ![]() Mitsubishi microcomputers M16C / 62 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER UART2 Special Mode Register 141 UART2 Special Mode Register The UART2 special mode register (address 037716) is used to control UART2 in various ways. Figure 1.19.26 shows the UART2 special mode register. UART2 special mode register Symbol Address When reset U2SMR 037716 0016 b7 b6 b5 b4 b3 b2 b1 b0 Bit name Bit symbol W R Function (During UART mode) Function (During clock synchronous serial I/O mode) ABSCS ACSE SSS I C mode selection bit Bus busy flag 0 : STOP condition detected 1 : START condition detected SCLL sync output enable bit Bus collision detect sampling clock select bit Arbitration lost detecting flag control bit 0 : Normal mode 1 : I C mode 0 : Update per bit 1 : Update per byte IICM ABC BBS LSYN 0 : Ordinary 1 : Falling edge of RxD2 0 : Disabled 1 : Enabled Transmit start condition select bit Must always be “0” 0 : Rising edge of transfer clock 1 : Underflow signal of timer A0 Auto clear function select bit of transmit enable bit 0 : No auto clear function 1 : Auto clear at occurrence of bus collision Must always be “0” Must always be “0” Must always be “0” Must always be “0” Must always be “0” Must always be “0” Note: Nothing but "0" may be written. (Note) 2 2 Reserved bit Always set to “0” 0 Figure 1.19.26. UART2 special mode register Function Normal mode I2C mode (Note 1) Factor of interrupt number 15 (Note 2) UART2 transmission No acknowledgment detection (NACK) Factor of interrupt number 16 (Note 2) UART2 reception Start condition detection or stop condition detection UART2 transmission output delay Not delayed Delayed P70 at the time when UART2 is in use TxD2 (output) SDA (input/output) (Note 3) P71 at the time when UART2 is in use RxD2 (input) SCL (input/output) P72 at the time when UART2 is in use CLK2 P72 DMA1 factor at the time when 1 1 0 1 is assigned to the DMA request factor selection bits UART2 reception Acknowledgment detection (ACK) Noise filter width 15ns 50ns Reading P71 Reading the terminal when 0 is assigned to the direction register Reading the terminal regardless of the value of the direction register 1 2 3 4 5 6 7 8 9 Note 1: Make the settings given below when I2C mode is in use. Set 0 1 0 in bits 2, 1, 0 of the UART2 transmission/reception mode register. Disable the RTS/CTS function. Choose the MSB First function. Note 2: Follow the steps given below to switch from a factor to another. 1. Disable the interrupt of the corresponding number. 2. Switch from a factor to another. 3. Reset the interrupt request flag of the corresponding number. 4. Set an interrupt level of the corresponding number. Note 3: Set an initial value of SDA transmission output when serial I/O is invalid. Factor of interrupt number 10 (Note 2) Bus collision detection Acknowledgment detection (ACK) 10 Initial value of UART2 output H level (when 0 is assigned to the CLK polarity select bit) The value set in latch P70 when the port is selected 11 Table 1.19.9. Features in I2C mode |
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