M16CSLASH62 datasheet(11/621 Pages) RENESAS

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4.2.1 Interrupt Enable Flag ........................................................................................................... 493

4.2.2 Interrupt Request Bit ............................................................................................................ 493

4.2.3 Changing the Interrupt Control Register .............................................................................. 494

4.2.4 Interrupt Priority Level Select Bit and Processor Interrupt Priority Level (IPL) .................... 495

4.3 Interrupt Sequence ..................................................................................................................... 496

4.3.1 Interrupt Response Time ..................................................................................................... 496

4.3.2 Variation of IPL when Interrupt Request is Accepted .......................................................... 497

4.3.3 Saving Registers .................................................................................................................. 498

4.4 Returning from an Interrupt Routine ........................................................................................... 500

4.5 Interrupt Priority .......................................................................................................................... 500

4.6 Multiple Interrupts ....................................................................................................................... 502

4.7 Precautions for Interrupts ........................................................................................................... 504

Chapter 5 External Buses __________________________________

5.1 Overview of External Buses ........................................................................................................ 508

5.2 Data Access ................................................................................................................................ 509

5.2.1 Data Bus Width .................................................................................................................... 509

5.2.2 Chip Selects and Address Bus ............................................................................................ 510

5.2.3 Bus Types ........................................................................................................................... 511

5.2.4 R/W Modes ......................................................................................................................... 511

5.3 Memory Space Expansion Features ........................................................................................... 512

5.3.1 Normal Mode ....................................................................................................................... 513

5.3.2 Memory Space Expansion Mode 1 ...................................................................................... 514

5.3.3 Memory Space Expansion Mode 2 ..................................................................................... 515

5.4 Connection Examples ................................................................................................................. 521

5.4.1 16-bit Memory to 16-bit Width Data Bus Connection Example ............................................ 521

5.4.2 8-bit Memory to 16-bit Width Data Bus Connection Example .............................................. 522

5.4.3 8-bit Memory to 8-bit Width Data Bus Connection Example ............................................... 524

5.4.4 Two 8-bit and 16-Bit Memory to 16-Bit Width Data Bus Connection Example .................... 525

5.4.5 16-bit Width Data Bus Connection Example in Memory Space Expansion Mode 1 ............ 526

5.4.6 8-bit Width Data Bus Connection Example in Memory Space Expansion Mode 1 ............. 527

5.4.7 8-bit Width Data Bus Connection Example in Memory Space Expansion Mode 2 ............. 528

5.4.8 Chip Selects and Address Bus ............................................................................................ 529

5.5 Connectable Memories ............................................................................................................... 530

5.5.1 Operation Frequency and Access Time .............................................................................. 530

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