SH7052 datasheet(691/919 Pages) RENESAS

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19.3.2

Port B Data Register (PBDR)

Bit:

PB15

PB14

PB13

PB12

PB11

PB10

PB9

PB8

Initial value:

R/W:

R/W

Bit:

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

Initial value:

R/W:

R/W

The port B data register (PBDR) is a 16-bit readable/writable register that stores port B data. Bits

PB15DR to PB0DR correspond to pins PB15/PULS5/SCK2 to PB0/TO6A.

When a pin functions as a general output, if a value is written to PBDR, that value is output

directly from the pin, and if PBDR is read, the register value is returned directly regardless of the

pin state.

When a pin functions as a general input, if PBDR is read the pin state, not the register value, is

returned directly. If a value is written to PBDR, although that value is written into PBDR it does

not affect the pin state. Table 19.4 summarizes port B data register read/write operations.

PBDR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in

hardware standby mode. It is not initialized in software standby mode or sleep mode.

Table 19.4

Port B Data Register (PBDR) Read/Write Operations

Bits 15 to 0:

PBIOR

Pin Function

Read

Write

General input

Pin state

Value is written to PBDR, but does not affect pin

state

Other than

general input

Pin state

Value is written to PBDR, but does not affect pin

state

General output

PBDR value

Write value is output from pin

Other than

general output

PBDR value

Value is written to PBDR, but does not affect pin

state

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