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SH7052 bảng dữ liệu(PDF) 528 Page - Renesas Technology Corp |
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SH7052 bảng dữ liệu(HTML) 528 Page - Renesas Technology Corp |
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528 / 919 page ![]() 502 Bus off status HCAN configuration mode HCAN sleep mode HCAN halt mode • Other features: DMAC can be activated by message reception mailbox (HCAN mailbox 0 only) 15.1.2 Block Diagram Figure 15.1 shows a block diagram of the HCAN. HTxD MBI Message buffer HRxD MPI Microprocessor interface (CDLC) CAN Data Link Controller Bosch CAN 2.0B active CPU interface Control register Status register HCAN Tx buffer Rx buffer Message control Message data MC0 to MC15, MD0 to MD15 LAFM Mailboxes Figure 15.1 HCAN Block Diagram Message Buffer Interface (MBI): The MBI, consisting of mailboxes and a local acceptance filter mask (LAFM), stores CAN transmit/receive messages (identifiers, data, etc.). Transmit messages are written by the CPU. For receive messages, the data received by the CDLC is stored automatically. Microprocessor Interface (MPI): The MPI, consisting of a bus interface, control register, status register, etc., controls HCAN internal data, statuses, and so forth. CAN Data Link Controller (CDLC): The CDLC performs transmission and reception of messages conforming to the Bosch CAN Ver. 2.0B active standard (data frames, remote frames, error frames, overload frames, inter-frame spacing), as well as CRC checking, bus arbitration, and other functions. |
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