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SH7052 bảng dữ liệu(PDF) 337 Page - Renesas Technology Corp

tên linh kiện SH7052
Giải thích chi tiết về linh kiện  SuperHTM RISC engine
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311
and channel 8 are linked by the timer connection register (TCNR), the corresponding channel 8
down-counter (DCNT) is started at the same time.
The OCR registers can only be accessed by a word read.
The OCR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode
and software standby mode.
10.2.19
Input Capture Registers (ICR)
The input capture registers (ICR) are 32-bit registers. The ATU-II has four 32-bit ICR registers in
channel 0.
Channel
Abbreviation
Function
0
ICR0AH, ICR0AL,
ICR0BH, ICR0BL,
ICR0CH, ICR0CL,
ICR0DH, ICR0DL
Dedicated input capture registers
Input Capture Registers 0AH, 0AL to 0DH, 0DL (ICR0AH, ICR0AL to ICR0DH, ICR0DL)
Bit:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Initial value:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial value:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
The ICR registers are 32-bit read-only registers used exclusively for input capture.
These dedicated input capture registers store the TCNT0 value on detection of an input capture
signal from an external source. The corresponding TSR0 bit is set to 1 at this time. The input
capture signal edge to be detected is specified by timer I/O control register TIOR0. By setting the
TRG0DEN bit in TCR10, ICR0DH and ICR0DL can also be used for input capture in a compare
match between TCNT10B and OCR10B.
The ICR registers can only be accessed by a longword read. Word reads cannot be used.



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