M32CSLASH86 datasheet(160/505 Pages) RENESAS

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Page 137

14. DMACII

)

(

Exit Priority Register

After Reset

XXXX 00002

Address

009F16

Symbol

RLVL

RLVL0

RLVL1

RLVL2

Stop/Wait Mode Exit

Minimum Interrupt Priority

Level Control Bit(1)

FSIT

High-Speed Interrupt

Set Bit(2)

0: Interrupt priority level 7 is used

for normal interrupt

1: Interrupt priority level 7 is used

for high-speed interrupt

DMAII

(b4)

(b7 - b6)

DMA II Select Bit(4)

0: Interrupt priority level 7 is used

for interrupt

1: Interrupt priority level 7 is used

for DMA II transfer(3)

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

0 0 0 : Level 0

0 0 1 : Level 1

0 1 0 : Level 2

0 1 1 : Level 3

1 0 0 : Level 4

1 0 1 : Level 5

1 1 0 : Level 6

1 1 1 : Level 7

b2 b1 b0

Bit Name

Function

Bit

Symbol

NOTES:

1. The microcomputer exits stop or wait mode when the requested interrupt priority level is higher than

the level set in the RLVL2 to RLVL0 bits. Set the RLVL2 to RLVL0 bits to the same value as IPL in

the FLG register.

2. When the FSIT bit is set to "1", an interrupt having the interrupt priority level 7 becomes the high-speed

interrupt. In this case, set only one interrupt to the interrupt priority level 7 and the DMAII bit to "0".

3. Set the ILVL2 to ILVL0 bits in the interrupt control register after setting the DMAII bit to "1".

Do not change the DMAII bit setting to "0" after setting the DMAII bit to "1". Set the FSIT bit to "0"

when the DMAII bit to "1".

4. The DMAII bit becomes indeterminate after reset. To use the DMAII bit for an interrupt setting, set it

to "0" before setting the interrupt control register.

Figure 14.1 RLVL Register

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