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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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M32C/86 bảng dữ liệu(PDF) 36 Page - Renesas Technology Corp |
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M32C/86 bảng dữ liệu(HTML) 36 Page - Renesas Technology Corp |
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36 / 505 page  Page 13 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 2. Central Processing Unit (CPU) 2. Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. The register bank is comprised of 8 registers (R0, R1, R2, R3, A0, A1, SB and FB) out of 28 CPU registers. Two sets of register banks are provided. Figure 2.1 CPU Register b23 R0H R0L R1H R1L R2 R3 b31 R2 R3 A0 A1 SB FB USP ISP INTB PC High-Speed Interrupt Register b15 b0 b23 SVF SVP VCT DMAC-Associated Register b7 b0 b23 DMD0 DCT0 DCT1 b15 DRC0 DRC1 DMA0 DMA1 DMD1 DRA0 DRA1 Data Register(1) Address Register(1) Static Base Register(1) Frame Base Register(1) User Stack Pointer Interrupt Stack Pointer Interrupt Table Register Program Counter Flag Save Register PC Save Register Vector Register DMA Mode Register DMA Transfer Count Register DMA Transfer Count Reload Register DMA Memory Address Register DMA SFR Address Register DMA Memory Address Reload Register NOTES: 1. The register bank is comprised of these registers. Two sets of register banks are provided. General Register b15 b0 b15 b0 Carry Flag Debug Flag Zero Flag Sign Flag Register Bank Select Flag Overflow Flag Interrupt Enable Flag Stack Pointer Select Flag Reserved Space Processor Interrupt Priority Level Reserved Space FLG Flag Register IPL U I O B S Z D C b7 b8 DSA0 DSA1 |
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