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H838532H bảng dữ liệu(PDF) 311 Page - Renesas Technology Corp |
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H838532H bảng dữ liệu(HTML) 311 Page - Renesas Technology Corp |
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311 / 508 page ![]() Section 10 Serial Communication Interface Rev. 1.00 May 30, 2008 Page 291 of 484 REJ09B0436-0100 10.2.5 Serial Mode Register (SMR) Bit Initial value Read/Write 7 COM 0 R/W 6 CHR 0 R/W 5 PE 0 R/W 4 PM 0 R/W 3 STOP 0 R/W 0 CKS0 0 R/W 2 MP 0 R/W 1 CKS1 0 R/W SMR is an 8-bit register used to set the serial data transfer format and to select the clock source for the baud rate generator. SMR can be read or written by the CPU at any time. SMR is initialized to H'00 upon reset, and in standby, module standby, or watch mode. Bit 7: Communication mode (COM) Bit 7 selects whether SCI3 operates in asynchronous mode or synchronous mode. Bit 7 COM Description 0 Asynchronous mode (initial value) 1 Synchronous mode Bit 6: Character length (CHR) Bit 6 selects either 7 or 8 bits as the data length to be used in asynchronous mode. In synchronous mode the data length is always 8 bits, irrespective of the bit 6 setting. Bit 6 CHR Description 0 8-bit data/5-bit data* 2 (initial value) 1 7-bit data* 1/5-bit data*2 Notes: 1. When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted. 2. When 5-bit data is selected, set both PE and MP to 1. The three most significant bits (bits 7, 6, and 5) of TDR are not transmitted. |
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