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H838532H bảng dữ liệu(PDF) 309 Page - Renesas Technology Corp |
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H838532H bảng dữ liệu(HTML) 309 Page - Renesas Technology Corp |
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309 / 508 page ![]() Section 10 Serial Communication Interface Rev. 1.00 May 30, 2008 Page 289 of 484 REJ09B0436-0100 10.2 Register Descriptions 10.2.1 Receive Shift Register (RSR) Bit Read/Write 7 — 6 — 5 — 4 — 3 — 0 — 2 — 1 — RSR is a register used to receive serial data. Serial data input to RSR from the RXD 3x pin is set in the order in which it is received, starting from the LSB (bit 0), and converted to parallel data. When one byte of data is received, it is transferred to RDR automatically. RSR cannot be read or written directly by the CPU. 10.2.2 Receive Data Register (RDR) Bit Initial value Read/Write 7 RDR7 0 R 6 RDR6 0 R 5 RDR5 0 R 4 RDR4 0 R 3 RDR3 0 R 0 RDR0 0 R 2 RDR2 0 R 1 RDR1 0 R RDR is an 8-bit register that stores received serial data. When reception of one byte of data is finished, the received data is transferred from RSR to RDR, and the receive operation is completed. RSR is then able to receive data. RSR and RDR are double-buffered, allowing consecutive receive operations. RDR is a read-only register, and cannot be written by the CPU. RDR is initialized to H'00 upon reset, and in standby, module standby or watch mode. |
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