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M32C/8B bảng dữ liệu(PDF) 291 Page - Renesas Technology Corp |
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M32C/8B bảng dữ liệu(HTML) 291 Page - Renesas Technology Corp |
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291 / 406 page ![]() Under development M32C/8B Group 20. CRC Calculation Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 274 of 385 20. CRC Calculation The CRC (Cyclic Redundancy Check) calculation detects an error in data blocks. A generator polynomial of CRC - CCITT (X16 + X12 + X5 + 1) generates CRC code. The CRC code is a 16-bit code generated for a given length of the data block in bytes. The CRC code is stored in the CRCD register every time one-byte data is transferred to the CRCIN register after a default value is written to the CRCD register. CRC code generation for one-byte data is completed in two bus clock cycles. Figure 20.1 shows a block diagram of the CRC circuit. Figure 20.2 shows CRC-associated registers. Figure 20.3 shows an example of the CRC calculation. Figure 20.1 CRC Calculation Block Diagram Figure 20.2 CRCD Register, CRCIN Register CRCD register High-order bits of data bus Low-order bits of data bus 8 low-order bits 8 high-order bits CRC code generation circuit X16 + X12 + X5 + 1 CRCIN register b15 Symbol CRCD Address 037Dh - 037Ch After Reset Undefined b0 Function RW After an initial value is written to the CRCD register, the CRC code can be read from the CRCD register by writing data to the CRCIN register. Bit position of the initial value is inverted. The inverted value is read as the CRC code. 0000h to FFFFh CRC Data Register RW Setting Range b8 b7 b7 Symbol CRCIN Adddress 037Eh b0 Function RW Data input. Inverse bit position of data 00h to FFh CRC Input Register RW Setting Range After Reset Undefined |
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