M32CSLASH8B datasheet(284/406 Pages) RENESAS

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M32C/8B Group

18. A/D Converter

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 267 of 385

18.2

Functions

18.2.1

Resolution

The BITS bit in the AD0CON1 register determines the resolution. When the BITS bit is set to 1 (10-bit mode),

the A/D conversion result is stored into bits 9 to 0 in the AD0i register (i = 0 to 7). When the BITS bit is set to 0

(8-bit mode), the A/D conversion result is stored into bits 7 to 0 in the AD0i register.

18.2.2

Sample and Hold

When the SMP bit in the AD0CON2 register is set to 1 (with sample and hold), the A/D conversion rate per pin

increases to 28

φAD cycles for 8-bit resolution and 33 φAD cycles for 10-bit resolution. The sample and hold

function is available in all operating modes. Start A/D conversion after selecting whether the sample and hold

circuit is used or not.

18.2.3

Trigger Select Function

The TRG bit in the AD0CON0 register and the TRG0 bit in the AD0CON2 register determine a trigger to start

A/D conversion. Table 18.11 lists setting values for the trigger select function.

Table 18.11

Trigger Select Function Setting Values

NOTES:

1. A/D conversion starts when the ADST bit is set to 1 (A/D conversion starts) and a trigger is input.

2. If an external trigger or a hardware trigger (retrigger) is input during A/D conversion, the sequence of A/D

conversions in progress is aborted and starts over from the beginning.

18.2.4

DMAC Operating Mode

DMAC operating mode is available in all operating modes. To select multi-port single sweep mode or multi-

port repeat sweep mode 0, DMAC operating mode must be used. When the DUS bit in the AD0CON3 register

is set to 1 (DMAC operating mode used), all A/D conversion results are stored into the AD00 register. DMAC

transfers the result from the AD00 register to a given memory space every time A/D conversion on a single pin

is completed. 8-bit DMA transfer must be selected for 8-bit resolution and 16-bit DMA transfer for 10-bit

resolution. Refer to 13. DMAC for DMAC instructions.

When using DMAC operating mode in single sweep mode, repeat sweep mode 0, repeat sweep mode 1, multi-

port single sweep mode, or multi-port repeat sweep mode 0, do not input an external retrigger or hardware

retrigger. If a retrigger is input, the sequence of A/D conversions in progress is aborted and starts over from the

ANi_0 pin (i = none, 0, 2, 15). As a result, a pin and the conversion result of the pin transferred to the RAM do

not correspond to each other.

18.2.5

Extended Analog Input Pins

In one-shot mode and repeat mode, the ANEX0 pin or ANEX1 pin can be used as the analog input pin. These

pins can be selected using bits OPA1 and OPA0 in the AD0CON1 register. The A/D conversion result for

ANEX0 input is stored into the AD00 register, and for ANEX1 input into the AD01 register. Both results are

stored into the AD00 register when the DUS bit in the AD0CON3 register is set to 1 (DMAC operating mode

used).

Set bits APS1 and APS0 in the AD0CON2 register to 00b (AN_0 to AN_7, ANEX0, ANEX1) and the MSS bit

in the AD0CON3 register to 0 (multi-port sweep mode not used).

Bit and Setting

Trigger

AD0CON0 Register

AD0CON2 Register

TRG = 0

−

Software trigger

A/D conversion starts when the ADST bit in the AD0CON0

TRG = 1(1)

TRG0 = 0

External trigger(2)

Falling edge of a signal applied to ADTRG

TRG0 = 1

Hardware trigger(2)

Timer B2 interrupt request of three-phase motor control timer

function (after the ICTB2 register completes counting)

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