M32CSLASH8B datasheet(273/406 Pages) RENESAS

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Under development

M32C/8B Group

18. A/D Converter

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 256 of 385

Figure 18.5

AD0CON3 Register

b6 b5 b4

A/D0 Control Register 3(1, 2)

Symbol

AD0CON3

Address

0395h

Bit Symbol

DUS

After Reset

XXXX X000b

NOTES:

1. If the AD0CON3 register is rewritten during A/D conversion, the conversion result will be incorrect.

2. The AD0CON3 register may return an incorrect value if read during A/D conversion. It must be read or written after the A/D

conversion stops.

3. When the MSS bit is set to 1;

-set the DUS bit to 1 and configure DMAC.

-set bits MD1 and MD0 in the AD0CON0 register to 10b or 11b.

-set bits SCAN1 and SCAN0 in the AD0CON1 register to 11b, the MD2 bit to 0, bits OPA1 and OPA0 to 00b.

-set bits APS1 and APS0 in the AD0CON2 register to 01b.

-set bits MPS11 and MPS10 to 01b, 10b, or 11b.

4. Refer to the note for the CKS0 bit in the AD0CON0 register.

5. Bits MSF1 and MSF0 are enabled when the MSS bit is set to 1. When the MSS bit is set to 0, a read from these bits returns an

undefined value.

MSS

CKS2

MSF0

MSF1

−

(b7-b5)

Bit Name

Multi-port sweep status flags(5)

Function

b4 b3

0 0: AN_0 to AN_7

0 1: AN15_0 to AN15_7

1 0: AN0_0 to AN0_7

1 1: AN2_0 to AN2_7

Reserved bits

Set to 0.

Read as undefined value.

Multi-port sweep mode

select bit

DMAC operating mode

select bit

0: Multi-port sweep mode not used

1: Multi-port sweep mode used(3)

0: DMAC operating mode not used

1: DMAC operating mode used

Frequency select bit 2

(Note 4)

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