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SH7261 bảng dữ liệu(PDF) 158 Page - Renesas Technology Corp

tên linh kiện SH7261
Giải thích chi tiết về linh kiện  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
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Section 6 Interrupt Controller (INTC)
Rev. 2.00 Sep. 07, 2007 Page 126 of 1312
REJ09B0320-0200
6.3.3
Interrupt Control Register 1 (ICR1)
ICR1 is a 16-bit register that specifies the detection mode for external interrupt input pins IRQ7 to
IRQ0 individually: low level, falling edge, rising edge, or both edges. ICR1 is initialized by a
power-on reset or in deep standby mode.
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9876543210
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
IRQ7
1S
IRQ7
0S
IRQ6
1S
IRQ6
0S
IRQ5
1S
IRQ5
0S
IRQ4
1S
IRQ4
0S
IRQ3
1S
IRQ3
0S
IRQ2
1S
IRQ2
0S
IRQ1
1S
IRQ1
0S
IRQ0
1S
IRQ0
0S
Bit
Bit Name
Initial
Value
R/W
Description
15
IRQ71S
0
R/W
14
IRQ70S
0
R/W
13
IRQ61S
0
R/W
12
IRQ60S
0
R/W
11
IRQ51S
0
R/W
10
IRQ50S
0
R/W
9
IRQ41S
0
R/W
8
IRQ40S
0
R/W
7
IRQ31S
0
R/W
6
IRQ30S
0
R/W
5
IRQ21S
0
R/W
4
IRQ20S
0
R/W
3
IRQ11S
0
R/W
2
IRQ10S
0
R/W
1
IRQ01S
0
R/W
0
IRQ00S
0
R/W
IRQ Sense Select
These bits select whether interrupt signals
corresponding to pins IRQ7 to IRQ0 are detected by a
low level, falling edge, rising edge, or both edges.
00: Interrupt request is detected on low level of IRQn
input
01: Interrupt request is detected on falling edge of IRQn
input
10: Interrupt request is detected on rising edge of IRQn
input
11: Interrupt request is detected on both edges of IRQn
input
[Legend]
n = 7 to 0



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