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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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7549 bảng dữ liệu(PDF) 16 Page - Renesas Technology Corp |
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7549 bảng dữ liệu(HTML) 16 Page - Renesas Technology Corp |
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16 / 84 page  Rev.2.01 Oct 15, 2007 Page 16 of 81 REJ03B0202-0201 7549 Group Table 6 I/O port function table NOTE: 1. Function set ROM data 1 is included in the function set ROM area. Pin Name I/O format Non-port function SFRs related each pin P00(LED0)/INT0 P01(LED1)/INT1 I/O port P0 CMOS compatible input level CMOS 3-state output External interrupt input Interrupt edge selection register Port P0 drive capacity control register Port P0 pull-up control register P02(LED2) Port P0 drive capacity control register Port P0 pull-up control register P03(LED3)/CAP0 Capture input Capture/Compare port register Port P0 drive capacity control register Port P0 pull-up control register P04(LED4)/RXD Serial interface input/ output Serial I/O control register Port P0 drive capacity control register Port P0 pull-up control register P05(LED5)/TXD Serial I/O control register UART control register Port P0 drive capacity control register Port P0 pull-up control register P06(LED6)/SCLK Serial I/O control register Port P0 drive capacity control register Port P0 pull-up control register P07(LED7)/SRDY Serial I/O control register Port P0 drive capacity control register Port P0 pull-up control register P10/AN0/KEY0/CMP0 P11/AN1/KEY1/CMP1 P12/AN2/KEY2/CMP2 I/O port P1 Compare output Key input interrupt A/D conversion input Capture/Compare port register Port P1 pull-up control register Key-on wakeup input selection register AD control register P13/AN3/KEY3/T2OUT Timer 2 output Key input interrupt A/D conversion input Timer mode register Port P1 pull-up control register Key-on wakeup input selection register AD control register P14/AN4/KEY4 P15/AN5/KEY5 P16/AN6/KEY6 P17/AN7/KEY7 Key input interrupt A/D conversion input Port P1 pull-up control register Key-on wakeup input selection register AD control register P20/XOUT/XCOUT I/O port P2 CMOS 3-state output Clock pin Function set ROM data 1 (Note) Clock mode register P21/XIN/XCIN CMOS compatible input level CMOS 3-state output Clock pin Function set ROM data 1 (Note) Clock mode register P30 P31 I/O port P3 |
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