7549 datasheet(70/84 Pages) RENESAS

70 / 84 page

Rev.2.01

Oct 15, 2007

Page 70 of 81

REJ03B0202-0201

7549 Group

Table 22 Timing requirements (3)

(VCC = 1.8 to 5.5 V, VSS = 0 V, Ta =

−20 to 85 °C, unless otherwise noted)

NOTES:

1. As for CAP0, it is the value when noise filter is not used.

2. In this time, bit 6 of the serial I/O control register (address 001A16) is set to “1” (clock synchronous serial I/O is selected).

When bit 6 of the serial I/O control register is “0” (clock asynchronous serial I/O is selected), the rating values are divided by 4.

Reset input “L” pulse width

External clock input cycle time

External clock input “H” pulse width

External clock input “L” pulse width

INT0, INT1, CAP0 input “H” pulse width (Note 1)

INT0, INT1, CAP0 input “L” pulse width (Note 1)

Serial I/O clock input cycle time (Note 2)

Serial I/O clock input “H” pulse width (Note 2)

Serial I/O clock input “L” pulse width (Note 2)

Serial I/O input set up time

Serial I/O input hold time

Symbol

Parameter

Limits

Unit

Min.

500

200

460

4000

1900

800

400

Typ.

µs

Max.

______

tW(RESET)

tC(XIN)

tWH(XIN)

tWL(XIN)

tWH(INT0)

tWL(INT0)

tC(SCLK)

tWH(SCLK)

tWL(SCLK)

tsu(RXD-SCLK)

th(SCLK-RXD)

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