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7549 bảng dữ liệu(PDF) 38 Page - Renesas Technology Corp |
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7549 bảng dữ liệu(HTML) 38 Page - Renesas Technology Corp |
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38 / 84 page ![]() Rev.2.01 Oct 15, 2007 Page 38 of 81 REJ03B0202-0201 7549 Group [Transmit buffer register/receive buffer register (TB/ RB)] 001816 The transmit buffer register and the receive buffer register are located at the same address. The transmit buffer is write-only and the receive buffer is read-only. If a character bit length is 7 bits, the MSB of data stored in the receive buffer is “0”. [Serial I/O status register (SIOSTS)] 001916 The read-only serial I/O status register consists of seven flags (bits 0 to 6) which indicate the operating status of the serial I/O function and various errors. Three of the flags (bits 4 to 6) are valid only in UART mode. The receive buffer full flag (bit 1) is cleared to “0” when the receive buffer register is read. If there is an error, it is detected at the same time that data is transferred from the receive shift register to the receive buffer register, and the receive buffer full flag is set. A write to the serial I/O status register clears all the error flags OE, PE, FE, and SE (bit 3 to bit 6, respectively). Writing “0” to the serial I/O enable bit SIOE (bit 7 of the serial I/O control register) also clears all the status flags, including the error flags. Bits 0 to 6 of the serial I/O status register are initialized to “0” at reset, but if the transmit enable bit of the serial I/O control register has been set to “1”, the transmit shift completion flag (bit 2) and the transmit buffer empty flag (bit 0) become “1”. [Serial I/O control register (SIOCON)] 001A16 The serial I/O control register consists of eight control bits for the serial I/O function. [UART control register (UARTCON)] 001B16 The UART control register consists of four control bits (bits 0 to 3) which are valid when asynchronous serial I/O is selected and set the data format of an data transfer and one bit (bit 4) which is always valid and sets the output structure of the P05/TxD pin. [Baud rate generator (BRG)] 001C16 The baud rate generator determines the baud rate for serial transfer. The baud rate generator divides the frequency of the count source by 1/(n + 1), where n is the value written to the baud rate generator. •Notes • Serial I/O interrupt When setting the transmit enable bit to “1”, the serial I/O transmit interrupt request bit is automatically set to “1”. When not requiring the interrupt occurrence synchronized with the transmission enabled, take the following sequence. 1. Set the serial I/O transmit interrupt enable bit to “0” (dis- abled). 2. Set the transmit enable bit to “1”. 3. Set the serial I/O transmit interrupt request bit to “0” after 1 or more instructions have been executed. 4. Set the serial I/O transmit interrupt enable bit to “1” (enabled). • I/O pin function when serial I/O is enabled. The functions of P06 and P07 are switched with the setting values of a serial I/O mode selection bit and a serial I/O synchronous clock selection bit as follows. (1) Serial I/O mode selection bit → “1” : Clock synchronous type serial I/O is selected. Setup of a serial I/O synchronous clock selection bit “0” : P06 pin turns into an output pin of a synchronous clock. “1” : P06 pin turns into an input pin of a synchronous clock. Setup of a SRDY output enable bit (SRDY) “0” : P07 pin can be used as a normal I/O pin. “1” : P07 pin turns into a SRDY output pin. (2) Serial I/O mode selection bit → “0” : Clock asynchronous (UART) type serial I/O is selected. Setup of a serial I/O synchronous clock selection bit “0” : P06 pin can be used as a normal I/O pin. “1” : P06 pin turns into an input pin of an external clock. When clock asynchronous (UART) type serial I/O is selected, it is P07 pin. It can be used as a normal I/O pin. |
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