7547 datasheet(37/91 Pages) RENESAS

37 / 91 page

Rev.1.21

Nov 15, 2006

page 37 of 89

REJ03B0156-0121

7547 Group

Fig. 39 Structure of capture software trigger register

Capture register 0 (Low-order)

(CAP0L : address 000C16)

Capture register 0 (High-order)

(CAP0H : address 000D16)

Capture register 1 (Low-order)

(CAP1L : address 000E16)

Capture register 1 (High-order)

(CAP1H : address 000F16)

Capture 0 interrupt edge selection bits

b1 b0

00: Rising and falling edge

01: Rising edge

10: Falling edge

11: Not available

Capture 1 interrupt edge selection bits

b3 b2

00: Rising and falling edge

01: Rising edge

10: Falling edge

11: Not available

Capture 0 noise filter clock selection bits

b5 b4

00: Filter stop

01: f(XIN)

10: f(XIN)/8

11: f(XIN)/32

Capture 1 noise filter clock selection bits

b7 b6

00: Filter stop

01: f(XIN)

10: f(XIN)/8

11: f(XIN)/32

Capture mode register

(CAPM : address 002016, initial value: 0016)

Capture latch 00 software trigger bit

Capture latch 01 software trigger bit

Capture latch 10 software trigger bit

Capture latch 11 software trigger bit

Each software trigger occurs by setting “1” to

corresponding bit. (returns “0” when read)

Not used (returns “0” when read)

Capture software trigger register

(CSTR : address 001316, initial value: 0016)

Fig. 40 Structure of capture software trigger register/capture

mode register

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