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7516 bảng dữ liệu(PDF) 71 Page - Renesas Technology Corp |
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7516 bảng dữ liệu(HTML) 71 Page - Renesas Technology Corp |
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71 / 90 page ![]() Rev.1.01 Jul 01, 2003 page 71 of 89 7516 Group qStatus Register (SRD) The status register indicates operating status of the flash memory and status such as whether an erase operation or a program ended successfully or in error. It can be read by writing the read status register command (7016). Also, the status register is cleared by writing the clear status register command (5016). Table 18 lists the definition of each status register bit. After releas- ing the reset, the status register becomes “8016”. •Sequencer status (SR7) The sequencer status indicates the operating status of the flash memory. After power-on and recover from deep power down mode, the se- quencer status is set to “1” (ready). This status bit is set to “0” (busy) during write or erase operation and is set to “1” upon completion of these operations. •Erase status (SR5) The erase status indicates the operating status of erase operation. If an erase error occurs, it is set to “1”. When the erase status is cleared, it is set to “0”. •Program status (SR4) The program status indicates the operating status of write opera- tion. If a program error occurs, it is set to “1”. When the program status is cleared, it is set to “0”. SRD0 bits SR7 (bit7) SR6 (bit6) SR5 (bit5) SR4 (bit4) SR3 (bit3) SR2 (bit2) SR1 (bit1) SR0 (bit0) Definition “1”“0” Table 18 Definition of each bit of status register (SRD) Status name Sequencer status Reserved Erase status Program status Reserved Reserved Reserved Reserved Ready - Terminated in error Terminated in error - - - - Busy - Terminated normally Terminated normally - - - - |
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