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7516 bảng dữ liệu(PDF) 41 Page - Renesas Technology Corp |
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7516 bảng dữ liệu(HTML) 41 Page - Renesas Technology Corp |
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41 / 90 page ![]() Rev.1.01 Jul 01, 2003 page 41 of 89 7516 Group Fig. 42 Structure of PWM control register Fig. 43 PWM output timing when PWM register or PWM prescaler is changed sNote The PWM starts after the PWM function enable bit is set to enable and “L” level is output from the PWM pin. The length of this “L” level output is as follows: sec (Count source selection bit = 0, where n is the value set in the prescaler) sec (Count source selection bit = 1, where n is the value set in the prescaler) n+1 2 • f(XIN) n+1 f(XIN) PWM control register (PWMCON : address 001D16) PWM function enable bit Count source selection bit Not used (return “0” when read) b7 b0 0: PWM disabled 1: PWM enabled 0: f(XIN) (f(XCIN) at low-speed mode) 1: f(XIN)/2 (f(XCIN)/2 at low-speed mode) AB C B T C T2 = PWM output PWM register write signal PWM prescaler write signal (Changes “H” term from “A” to “B”.) (Changes PWM period from “T” to “T2”.) When the contents of the PWM register or PWM prescaler have changed, the PWM output will change from the next period after the change. T T T2 |
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