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HD404339FS bảng dữ liệu(PDF) 31 Page - Renesas Technology Corp |
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HD404339FS bảng dữ liệu(HTML) 31 Page - Renesas Technology Corp |
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31 / 80 page ![]() HD404339 Series 29 Bit Initial value Read/Write Bit name 3 0 W SSR13*1 2 0 W SSR12 0 — — Not used 1 0 W SSR11 System clock selection register 1 (SSR1: $027) System Clock Selection*2 0.4 to 1.0 MHz 1.6 to 4.5 MHz SSR11 0 1 SSR12 0 1 Ratio Selection fSUB = fX/8 fSUB = fX/4 32-kHz Oscillation Division SSR13 0 1 32-kHz Oscillation Stop Oscillation operates in stop mode Oscillation stops in stop mode Notes: *1 *2 SSR13 will only be cleared to 0 by a RESET input. A STOPC input during stop mode will not clear SSR13. Also note that SSR13 will not be cleared upon transition to stop mode. When the subsystem oscillator (32.768 kHz crystal oscillator) is used, set 0.4 MHz ≤ f OSC ≤ 1.0MHz or 1.6 MHz ≤ f OSC ≤ 4.5 MHz. Figure 20 System Clock Selection Register 1 (SSR1) Bit Initial value Read/Write Bit name 3 — — Not used 2 — — Not used 0 0 W SSR20 1 0 W SSR21 System clock selection register 2 (SSR2: $028) SSR21 0 0 1 1 SSR20 0 1 0 1 System Clock Division Ratio 1/4 division 1/8 division 1/16 division 1/32 division Figure 21 System Clock Selection Register 2 (SSR2) |
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