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LFSC bảng dữ liệu(PDF) 54 Page - Lattice Semiconductor |
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LFSC bảng dữ liệu(HTML) 54 Page - Lattice Semiconductor |
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54 / 237 page ![]() 3-10 DC and Switching Characteristics Lattice Semiconductor LatticeSC/M Family Data Sheet LVPECL The LatticeSC devices support differential LVPECL standard. This standard is emulated using controlled imped- ance complementary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The scheme shown in Figure 3-3 is one possible solution for point-to-point signals. Figure 3-3. Differential LVPECL Table 3-3. LVPECL DC Conditions 1 Over Recommended Operating Conditions For further information on LVPECL, BLVDS, MLVDS and other differential interfaces please see details of additional technical documentation at the end of this data sheet. On-die Differential Common Mode Termination Symbol Description Nominal Units ZOUT Output impedance 16 ohm RS Driver series resistor 85 ohm RP Driver parallel resistor 150 ohm RT Receiver termination 100 ohm VOH Output high voltage 2.03 V VOL Output low voltage 1.27 V VOD Output differential voltage 0.76 V VCM Output common mode voltage 1.65 V ZBACK Back impedance 86 ohm IDC DC output current 12.6 mA 1. For input buffer, see LVDS table. Symbol Description Min. Typ. Max. Units CCMT Capacitance VCMT to GND — 40 — pF Transmission line, Zo = 100 ohm differential 100 ohms 150 ohms ON-chip OFF-chip 3.3V 3.3V 24mA ~16 ohms 24mA ~16 ohms + 85 ohms +/-1% 85 ohms +/-1% Zback - |
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