C167CS-4RM datasheet(82/517 Pages) INFINEON

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C167CS

Derivatives

The Central Processing Unit (CPU)

User’s Manual

4-32

V2.0, 2000-07

The Multiply/Divide Control Register MDC

This bit addressable 16-bit register is implicitly used by the CPU, when it performs a

multiplication or a division. It is used to store the required control information for the

corresponding multiply or divide operation. Register MDC is updated by hardware during

each single cycle of a multiply or divide instruction.

When a division or multiplication was interrupted before its completion and the multiply/

divide unit is required, the MDC register must first be saved along with registers MDH

and MDL (to be able to restart the interrupted operation later), and then it must be

cleared prepare it for the new calculation. After completion of the new division or

multiplication, the state of the interrupted multiply or divide operation must be restored.

The MDRIU flag is the only portion of the MDC register which might be of interest for the

user. The remaining portions of the MDC register are reserved for dedicated use by the

hardware, and should never be modified by the user in another way than described

above. Otherwise, a correct continuation of an interrupted multiply or divide operation

cannot be guaranteed.

A detailed description of how to use the MDC register for programming multiply and

divide algorithms can be found in Chapter 22.

MDC

Multiply/Divide Control Reg.

SFR (FF0EH/87H)

Reset Value: 0000H

9876

543210

------

! !

MDR

! !! !! !! !

r(w)h r(w)h r(w)h r(w)h r(w)h r(w)h r(w)h r(w)h

Bit

Function

MDRIU

Multiply/Divide Register In Use

Cleared, when register MDL is read via software.

Set when register MDL or MDH is written via software, or when

a multiply or divide instruction is executed.

Internal Machine Status

The multiply/divide unit uses these bits to control internal operations.

Never modify these bits without saving and restoring register MDC.

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