ST72E121 datasheet(56/92 Pages) STMICROELECTRONICS

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ST72E121 ST72T121

SERIAL COMMUNICATIONS INTERFACE (Cont’d)

4.4.4.4 Conventional Baud Rate Generation

The baud rate for the receiver and transmitter (Rx

and Tx) are set independently and calculated as

follows:

with:

PR = 1, 3, 4 or 13 (see SCP0 & SCP1 bits)

TR = 1, 2, 4, 8, 16, 32, 64,128

(see SCT0, SCT1 & SCT2 bits)

RR = 1, 2, 4, 8, 16, 32, 64,128

(see SCR0,SCR1 & SCR2 bits)

All this bits are in the BRR register.

Example: If fCPU is 8 MHz (normal mode) and if

PR=13 and TR=RR=1, the transmit and receive

baud rates are 19200 baud.

Note: the baud rate registers MUST NOT be

changed while the transmitter or the receiver is en-

abled.

4.4.4.5 Extended Baud Rate Generation

The extended prescaler option gives a very fine

tuning on the baud rate, using a 255 value prescal-

er, whereas the conventional Baud Rate Genera-

tor retains industry standard software compatibili-

ty.

The extended baud rate generator block diagram

is described in the Figure 34.

The output clock rate sent to the transmitter or to

the receiver will be the output from the 16 divider

divided by a factor ranging from 1 to 255 set in the

ERPR or the ETPR register.

Note: the extended prescaler is activated by set-

ting the ETPR or ERPR register to a value other

than zero. The baud rates are calculated as fol-

lows:

with:

ETPR = 1,..,255 (see ETPR register)

ERPR = 1,.. 255 (see ERPR register)

4.4.4.6 Receiver Muting and Wake-up Feature

In multiprocessor configurations it is often desira-

ble that only the intended message recipient

should actively receive the full message contents,

thus reducing redundant SCI service overhead for

all non addressed receivers.

The non addressed devices may be placed in

sleep mode by means of the muting function.

Setting the RWU bit by software puts the SCI in

sleep mode:

All the reception status bits can not be set.

All the receive interrupt are inhibited.

A muted receiver may be awakened by one of the

following two ways:

– by Idle Line detection if the WAKE bit is reset,

– by Address Mark detection if the WAKE bit is set.

Receiver wakes-up by Idle Line detection when

the Receive line has recognised an Idle Frame.

Then the RWU bit is reset by hardware but the

IDLE bit is not set.

Receiver wakes-up by Address Mark detection

when it received a “1” as the most significant bit of

a word, thus indicating that the message is an ad-

dress. The reception of this particular word wakes

up the receiver, resets the RWU bit and sets the

RDRF bit, which allows the receiver to receive this

word normally and to use it as an address word.

Tx =

(32*PR)*TR

fCPU

Rx =

(32*PR)*RR

fCPU

Tx =

16*ETPR

fCPU

Rx =

16*ERPR

fCPU

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