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ST52T400 bảng dữ liệu(PDF) 59 Page - STMicroelectronics

tên linh kiện ST52T400
Giải thích chi tiết về linh kiện  8-BIT INTELLIGENT CONTROLLER UNIT ICU Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG
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9.3 Timer Interrupt
The TIMER can be programmed to generate an
Interrupt request until the end of the count or when
there is an Timer Stop signal (TSTRT). The Timer
can generate programmable Interrupts into 4 dif-
ferent modes:
Interrupt mode 1: Interrupt on Timer Stop.
Interrupt mode 2: Interrupt on Rising Edge of
TIMEROUT.
Interrupt mode 3: Interrupt on Falling Edge of
TIMEROUT.
Interrupt mode 4: Interrupt on both edges of
TIMEROUT.
The Interrupt mode can be selected by means of
INTSL and INTE bits of the REG_CONF5.
NOTE:
the interrupt on TIMEROUT rising edge is
also generated after the Start.
WARNING:
If the PWM/Timer is configured with
the Interrupt on Stop and the Start/Stop is
configured as external, a low signal in the STRT
pin determines a PWM/Timer interrupt even if the
peripheral is off. If the interrupt is configured on
falling edge, a reset signal generates an interrupt
request.
Reset Configuration = “00000000”
Table 9.1 Configuration Register 5 Description
Bit
Name
Value
Description
0
TIRST
0
Internal RESET
1
Internal SET
1
TERST
0
External RESET on Level
1
External RESET on Edge
2
TISTR
0
Internal STOP
1
Internal START
3
TESTR
0
External START on Level
1
External START on Edge
4
INTE
00
TIMER Interrupt on TIMEROUT Falling Edge
01
TIMER Interrupt on TIMEROUT Rising Edge
5
10
TIMER Interrupt on Both Edges of TIMEROUT
11
- not used
6
INTSL
0
TIMER Interrupt on Counter Stop
1
TIMER Interrupt on TIMEROUT Edges
7
TMODE
0
TIMER MODE
1
PWM MODE



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