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NRF52810-QCAA-R bảng dữ liệu(PDF) 327 Page - Nordic Semiconductor

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Peripherals
Operation/Function
Jitter
START to COUNTER increment
+/- 15 μs
COMPARE to COMPARE 21
+/- 62.5 ns
Table 66: RTC jitter magnitudes on events
1. CLEAR and STOP (and TRIGOVRFLW; not shown) will be delayed as long as it takes for the peripheral to
clock a falling edge and rising of the LFCLK. This is between 15.2585 μs and 45.7755 μs – rounded to 15
μs and 46 μs for the remainder of the section.
0x000
SysClk
LFClk
PRESC
COUNTER
CLEARa
X
X+1
0x000000
0x000001
0 or more SysClk after
CLEAR
CLEARb
1 or more SysClk before
<= ~46 us
>= ~15 us
Figure 85: Timing diagram - DELAY_CLEAR
SysClk
LFClk
PRESC
COUNTER
STOPa
X
X+1
0 or more SysClk after
STOP
STOPb
1 or more SysClk before
<= ~46 us
>= ~15 us
0x000
Figure 86: Timing diagram - DELAY_STOP
2. The START task will start the RTC. Assuming that the LFCLK was previously running and stable, the
first increment of COUNTER (and instance of TICK event) will be typically after 30.5 μs +/-15 μs. In
some cases, in particular if the RTC is STARTed before the LFCLK is running, that timing can be up to
~250 μs. The software should therefore wait for the first TICK if it has to make sure the RTC is running.
Sending a TRIGOVRFLW task sets the COUNTER to a value close to overflow. However, since the update
of COUNTER relies on a stable LFCLK, sending this task while LFCLK is not running will start LFCLK,
but the update will then be delayed by the same amount of time of up to ~250 us. The figures show
the smallest and largest delays to on the START task which appears as a +/-15 μs jitter on the first
COUNTER increment.
21 Assumes RTC runs continuously between these events.
Note: 32.768 kHz clock jitter is additional to the numbers provided above.
4430_161 v1.0
327



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