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NRF52810-QCAA-R bảng dữ liệu(PDF) 55 Page - Nordic Semiconductor |
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NRF52810-QCAA-R bảng dữ liệu(HTML) 55 Page - Nordic Semiconductor |
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55 / 483 page ![]() 5 Power and clock management 5.1 Power management unit (PMU) Power and clock management in nRF52810 is designed to automatically ensure maximum power efficiency. The core of the power and clock management system is the power management unit (PMU) illustrated in Power management unit on page 55. MCU Internal voltage regulators External power sources External crystals Internal oscillators PMU CPU Memory Peripheral Figure 8: Power management unit The PMU automatically detects which power and clock resources are required by the different components in the system at any given time. It will then start/stop and choose operation modes in supply regulators and clock sources, without user interaction, to achieve the lowest power consumption possible. 5.2 Current consumption As the system is being constantly tuned by the Power management unit (PMU) on page 55, estimating the current consumption of an application can be challenging if the designer is not able to perform measurements directly on the hardware. To fascilitate the estimation process, a set of current consumption scenarios are provided to show the typical current drawn from the VDD supply. Each scenario specifies a set of operations and conditions applying to the given scenario. Current consumption scenarios, common conditions on page 56 shows a set of common conditions used in all scenarios, unless otherwise is stated in the description of a given scenario. All scenarios are listed in Electrical specification on page 56 4430_161 v1.0 55 |
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