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NRF52810-QCAA-R bảng dữ liệu(PDF) 83 Page - Nordic Semiconductor |
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NRF52810-QCAA-R bảng dữ liệu(HTML) 83 Page - Nordic Semiconductor |
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83 / 483 page ![]() Power and clock management Symbol Description Min. Typ. Max. Units tPOR,10ms VDD rise time 10ms 9 ms tPOR,60ms VDD rise time 60ms 23 ms tPINR If a GPIO pin is configured as reset, the maximum time taken to pull up the pin and release reset after power on reset. Dependent on the pin capacitive load (C)10: t=5RC, R = 13kOhm tPINR,500nF C = 500nF 32.5 ms tPINR,10uF C = 10uF 650 ms tR2ON Time from reset to ON (CPU execute) tR2ON,NOTCONF If reset pin not configured tPOR ms tR2ON,CONF If reset pin configured tPOR + tPINR ms tOFF2ON Time from OFF to CPU execute 16.5 µs tIDLE2CPU Time from IDLE to CPU execute 3.0 µs tEVTSET,CL1 Time from HW event to PPI event in Constant Latency System ON mode 0.0625 µs tEVTSET,CL0 Time from HW event to PPI event in Low Power System ON mode 0.0625 µs 5.3.10.2 Power fail comparator Symbol Description Min. Typ. Max. Units VPOF Nominal power level warning thresholds (falling supply voltage). Levels are configurable between Min. and Max. in 100mV increments. 1.7 2.8 V VPOFTOL Threshold voltage tolerance ±1 ±5 % VPOFHYST Threshold voltage hysteresis 50 mV VBOR,OFF Brown out reset voltage range SYSTEM OFF mode 1.2 1.7 V VBOR,ON Brown out reset voltage range SYSTEM ON mode 1.48 1.7 V 5.4 CLOCK — Clock control The clock control system can source the system clocks from a range of internal or external high and low frequency oscillators and distribute them to modules based upon a module’s individual requirements. Clock distribution is automated and grouped independently by module to limit current consumption in unused branches of the clock tree. Listed here are the main features for CLOCK: • 64 MHz on-chip oscillator • 64 MHz crystal oscillator, using external 32 MHz crystal • 32.768 kHz +/-500 ppm RC oscillator • 32.768 kHz crystal oscillator, using external 32.768 kHz crystal • 32.768 kHz oscillator synthesized from 64 MHz oscillator • Firmware (FW) override control of oscillator activity for low latency start up • Automatic oscillator and clock control, and distribution for ultra-low power 10 To decrease maximum time a device could hold in reset, a strong external pullup resistor can be used. 4430_161 v1.0 83 |
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