NRF52810-QCAA-R datasheet(257/483 Pages) NORDIC

257 / 483 page

Peripherals

COMPARE

...

COMPARE

COMP0

COMP1

COMP2

COMP3

SEQ[n].PTR

COMP0

COMP1

COMP2

COMP3

COMP0

COMP1

COMP2

COMP3

DECODER.LOAD=Common

COMPARE

...

COMPARE

COMP0

COMP1

COMP2

COMP3

COMP0

COMP1

DECODER.LOAD=Grouped

COMPARE

COMP0

COMP1

COMP3

DECODER.LOAD=Single

COMPARE

COMP2

Increasing Data

RAM Address

COMPARE

TOP

COMP0

COMP1

COUNTERTOP

DECODER.LOAD=WaveForm

COMPARE

COMP2

Figure 50: Decoder memory access modes

SEQ[n].PTR is the pointer used to fetch COMPARE values from RAM. If the SEQ[n].PTR is not pointing to

the Data RAM region, an EasyDMA transfer may result in a HardFault or RAM corruption. See Memory on

page 15 for more information about the different memory regions.

After the SEQ[n].PTR is set to the desired RAM location, the SEQ[n].CNT register must be set to the

number of 16-bit half words in the sequence. It is important to observe that the Grouped and Single

modes require one half word per group or one half word per channel respectively, and thus increases

RAM size occupation. If PWM generation was not running yet at that point, sending the SEQSTART[n]

task will load the first value from RAM, then start the PWM generation. A SEQSTARTED[n] event is

generated as soon as the EasyDMA has read the first PWM parameter from RAM and the wave counter

has started executing it. When LOOP.CNT=0, sequence n=0 or 1 is played back once. After the last value

in the sequence has been loaded and started executing, a SEQEND[n] event is generated. The PWM

generation will then continue with the last loaded value. See Simple sequence example on page 259

for an example of such simple playback.

To completely stop the PWM generation and force the associated pins to a defined state, a STOP task

can be fired at any time. A STOPPED event is generated when the PWM generation has stopped at the

end of currently running PWM period, and the pins go into their idle state as defined in GPIO->OUT.

PWM generation can then only be restarted through a SEQSTART[n] task. SEQSTART[n] will resume PWM

generation after having loaded the first value from the RAM buffer defined in the SEQ[n].PTR register.

The table below provides indication of when specific registers get sampled by the hardware. Care should

be taken when updating these registers to avoid values to be applied earlier than expected.

4430_161 v1.0

257

NRF52810-QCAA-R bảng dữ liệu(PDF) 257 Page - Nordic Semiconductor

NRF52810-QCAA-R bảng dữ liệu(HTML) 257 Page - Nordic Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL