NRF52811-QCAA-R7 datasheet(247/444 Pages) NORDIC

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Peripherals

RTC

32.768 kHz

CC[0:3]

PRESCALER

COUNTER

task

CLEAR

task

TRIGOVRFLW

event

TICK

event

OVRFLW

event

COMPARE[0..N]

task

START

task

STOP

Figure 89: RTC block schematic

The RTC module features a 24-bit COUNTER, a 12-bit (1/X) prescaler, capture/compare registers, and a tick

event generator for low power, tickless RTOS implementation.

6.16.1 Clock source

The RTC will run off the LFCLK.

The COUNTER resolution will therefore be 30.517 μs. Depending on the source, the RTC is able to run

while the HFCLK is OFF and PCLK16M is not available.

The software has to explicitely start LFCLK before using the RTC.

See CLOCK — Clock control on page 61 for more information about clock sources.

6.16.2 Resolution versus overflow and the PRESCALER

Counter increment frequency:

fRTC [kHz] = 32.768 / (PRESCALER + 1 )

The PRESCALER register is read/write when the RTC is stopped. The PRESCALER register is read-only once

the RTC is STARTed. Writing to the PRESCALER register when the RTC is started has no effect.

The PRESCALER is restarted on START, CLEAR and TRIGOVRFLW, that is, the prescaler value is latched to an

internal register (<<PRESC>>) on these tasks.

Examples:

1. Desired COUNTER frequency 100 Hz (10 ms counter period)

PRESCALER = round(32.768 kHz / 100 Hz) - 1 = 327

fRTC = 99.9 Hz

10009.576 μs counter period

2. Desired COUNTER frequency 8 Hz (125 ms counter period)

PRESCALER = round(32.768 kHz / 8 Hz) – 1 = 4095

fRTC = 8 Hz

4454_140 v1.0

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