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WM8951L bảng dữ liệu(PDF) 25 Page - Wolfson Microelectronics plc |
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WM8951L bảng dữ liệu(HTML) 25 Page - Wolfson Microelectronics plc |
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25 / 42 page ![]() Production Data WM8951 w PD Rev 4.1 December 2007 25 Figure 21 Master Mode As a slave device the WM8951L sequences the data transfer (ADCDAT) over the digital audio interface in response to the external applied clocks (BCLK, ADCLRC). This is illustrated in Figure 22. Figure 22 Slave Mode Note that the WM8951L relies on controlled phase relationships between audio interface BCLK, and the master MCLK or CLKOUT. To avoid any timing hazards, refer to the timing section for detailed information. AUDIO DATA SAMPLING RATES The WM8951L provides for two modes of operation (normal and USB) to generate the required ADC sampling rates. Normal and USB modes are programmed under software control according to the table below. In Normal mode, the user controls the sample rate by using an appropriate MCLK or crystal frequency and the sample rate control register setting. The WM8951L can support sample rates from 8ks/s up to 96ks/s. In USB mode, the user must use a fixed MLCK or crystal frequency of 12MHz to generate sample rates from 8ks/s to 96ks/s. It is called USB mode since the common USB (Universal Serial Bus) clock is at 12MHz and the WM8951L can be directly used within such systems. WM8951L can generate all the normal audio sample rates from this one Master Clock frequency, removing the need for different master clocks or PLL circuits. BCLK ADCDAT ADCLRC WM8951 ADC DSP ENCODER/ DECODER BCLK ADCDAT ADCLRC WM8951 ADC DSP ENCODER/ DECODER |
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