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PSD813F1 bảng dữ liệu(PDF) 90 Page - STMicroelectronics

tên linh kiện PSD813F1
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PSD813F1 bảng dữ liệu(HTML) 90 Page - STMicroelectronics

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PSD813F1-A
Preliminary
86
NOTES: 1. RD timing has the same timing as DS, LDS, UDS, and PSEN signals.
2. RD and PSEN have the same timing.
3. Any input used to select an internal PSD813F function.
4. In multiplexed mode, latched addresses generated from ADIO delay to address output on any Port.
5. RD timing has the same timing as DS, LDS, and UDS signals.
6. In Turbo Off mode, add 10ns to tAVQV.
-90
-12
-15
Turbo
Symbol
Parameter
Conditions
Min
Max
Min
Max
Min
Max
Off
Unit
tLVLX
ALE or AS Pulse Width
20
22
28
ns
tAVLX
Address Setup Time
(Note 3)
6
8
10
ns
tLXAX
Address Hold Time
(Note 3)
8
9
11
ns
tAVQV
Address Valid to Data Valid
(Notes 3 and 6)
90
120
150
Add 10
ns
t SLQV
CS Valid to Data Valid
100
135
150
ns
RD to Data Valid 8-Bit Bus
(Note 5)
32
35
40
ns
t RLQV
RD or PSEN to Data Valid
8-Bit Bus, 8031, 80251
(Note 2)
38
42
45
ns
t RHQX
RD Data Hold Time
(Note 1)
0
0
0
ns
tRLRH
RD Pulse Width
(Note 1)
32
35
38
ns
tRHQZ
RD to Data High-Z
(Note 1)
25
29
33
ns
tEHEL
E Pulse Width
32
36
38
ns
tTHEH
R/W Setup Time to Enable
10
13
18
ns
tELTL
R/W Hold Time After Enable
0
0
0
ns
tAVPV
Address Input Valid to
(Note 4)
25
28
32
ns
Address Output Delay
Read Timing (5 V ± 10% Versions)
Microcontroller Interface – PSD813F1 AC/DC Parameters
(5V ± 10% Versions)



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