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S124 bảng dữ liệu(PDF) 2 Page - Renesas Technology Corp

tên linh kiện S124
Giải thích chi tiết về linh kiện  S124 Microcontroller Group
PDF  107 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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S124 bảng dữ liệu(HTML) 2 Page - Renesas Technology Corp

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R01DS0264EU0140 Rev.1.40
Page 2 of 107
Sep 3, 2024
S124 Datasheet
1. Overview
1.
Overview
The MCU integrates multiple series of software- and pin-compatible Arm®-based 32-bit MCUs that share a common set
of Renesas peripherals to facilitate design scalability and efficient platform-based product development.
Based on the energy-efficient Arm Cortex®-M0+ core, the MCU is particularly well suited for cost-sensitive and low-
power applications with the following features:
 128-KB code flash memory
 16-KB SRAM
 Capacitive Touch Sensing Unit (CTSU)
 14-bit A/D Converter (ADC14)
 12-bit D/A Converter (DAC12)
 Security features.
1.1
Function Outline
Table 1.1
Arm core
Feature
Functional description
Arm Cortex-M0+
 Maximum operating frequency: up to 32 MHz
 Arm Cortex-M0+:
- Revision: r0p1-00rel0
- Armv6-M architecture profile
- Single-cycle integer multiplier.
 SysTick timer
- Driven by SYSTICCLK (LOCO) or ICLK.
Table 1.2
Memory
Feature
Functional description
Code flash memory
Maximum 128 KB code flash memory. See section 37, Flash Memory in Userʼs Manual.
Data flash memory
4 KB data flash memory. See section 37, Flash Memory in Userʼs Manual.
Option-setting memory
The option-setting memory determines the state of the MCU after a reset. See section 6,
Option-Setting Memory in Userʼs Manual.
SRAM
On-chip high-speed SRAM with even parity bit. See section 36, SRAM in Userʼs Manual.
Table 1.3
System (1 of 2)
Feature
Functional description
Operating mode
Two operating modes:
 Single-chip mode
 SCI boot mode.
See section 3, Operating Modes in Userʼs Manual.
Reset
9 types of resets:
 RES pin reset
 Power-on reset
 Independent watchdog timer reset
 Watchdog timer reset
 Voltage monitor 0 reset
 Voltage monitor 1 reset
 Voltage monitor 2 reset
 SRAM parity error reset
 Software reset.
See section 5, Resets in Userʼs Manual.
Low Voltage Detection (LVD)
The Low Voltage Detection (LVD) monitors the voltage level input to the VCC pin and the
detection level can be selected using a software program. See section 7, Low Voltage
Detection (LVD) in Userʼs Manual.



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