ADSP-21990BBC datasheet(33/50 Pages) AD

33 / 50 page

ADSP-21990

Rev. A

Page 33 of 50

August 2007

Serial Port Timing

Table 12 and Figure 13 describe SPORT transmit and receive

operations, while Figure 14 and Figure 15 describe SPORT

Frame Sync operations.

Table 12. Serial Port1, 2

Parameter

Min

Max

Unit

External Clock Timing Requirements

tSFSE

TFS/RFS Setup Before TCLK/RCLK3

4ns

tHFSE

TFS/RFS Hold After TCLK/RCLK3

4ns

tSDRE

Receive Data Setup Before RCLK3

1.5

tHDRE

Receive Data Hold After RCLK

4ns

tSCLKW

TCLK/RCLK Width

0.5tHCLK – 1

tSCLK

TCLK/RCLK Period

2tHCLK

Internal Clock Timing Requirements

tSFSI

TFS Setup Before TCLK4; RFS Setup Before RCLK3

4ns

tHFSI

TFS/RFS Hold After TCLK/RCLK

3ns

tSDRI

Receive Data Setup Before RCLK

2ns

tHDRI

Receive Data Hold After RCLK

5ns

External or Internal Clock Switching Characteristics

tDFSE

TFS/RFS Delay After TCLK/RCLK (Internally

Generated FS)4

tHOFSE

TFS/RFS Hold After TCLK/RCLK (Internally

Generated FS)

3ns

External Clock Switching Characteristics

tDDTE

Transmit Data Delay After TCLK4

13.4

tHDTE

Transmit Data Hold After TCLK4

4ns

Internal Clock Switching Characteristics

tDDTI

Transmit Data Delay After TCLK

13.4

tHDTI

Transmit Data Hold After TCLK4

4ns

tSCLKIW

TCLK/RCLK Width

0.5tHCLK – 3.5

0.5tHCLK + 2.5

Enable and Three-State Switching Characteristics

tDTENE

Data Enable from External TCLK

12.1

tDDTTE

Data Disable from External TCLK

tDTENI

Data Enable from Internal TCLK4

013

tDDTTI

Data Disable from External TCLK4

External Late Frame Sync Switching Characteristics

tDDTLFSE

Data Delay from Late External TFS with MCE=1, MFD=0

6, 7

10.5

tDTENLFSE

Data Enable from Late FS or MCE =1, MFD =0

6, 7

3.5

1 To determine whether communication is possible between two devices at clock speed n, the following specifications must be confirmed: 1) frame sync delay and frame

sync setup-and-hold, 2) data delay and data setup-and-hold, and 3) SCLK width.

2 Word selected timing for I2S mode is the same as TFS/RFS timing (normal framing only).

3 Referenced to sample edge.

4 Referenced to drive edge.

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