ADSP-21990BBC datasheet(32/50 Pages) AD

tên linh kiện	ADSP-21990BBC

Giải thích chi tiết về linh kiện	Mixed-Signal DSP Controller

PDF	50 Pages

Scroll/Zoom	100%

nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

Logo

32 / 50 page

Rev. A

Page 32 of 50

August 2007

ADSP-21990

External Port Bus Request/Grant Cycle Timing

Table 11 and Figure 12 describe external port bus request and

bus grant operations.

Table 11. External Port Bus Request and Grant Cycle Timing

Parameter1, 2

Min

Max

Unit

Timing Requirements

tBS

BR Asserted to CLKOUT High Setup

4.6

tBH

CLKOUT High to BR Deasserted Hold Time

Switching Characteristics

tSD

CLKOUT High to xMS, Address, and RD/WR Disable

0.5tHCLK + 1

tSE

CLKOUT Low to xMS, Address, and RD/WR Enable

04ns

tDBG

CLKOUT High to BG Asserted Setup

tEBG

CLKOUT High to BG Deasserted Hold Time

tDBH

CLKOUT High to BGH Asserted Setup

tEBH

CLKOUT High to BGH Deasserted Hold Time

1 tHCLK is the peripheral clock period.

2 These are timing parameters that are based on worst-case operating conditions.

Figure 12. External Port Bus Request and Grant Cycle Timing

tBH

A21–0

CLKOUT

tBS

tSD

tDBG

tDBH

tSE

tEBG

tEBH

BGH

MS3–0

IOMS

BMS

ADSP-21990BBC bảng dữ liệu(PDF) 32 Page - Analog Devices

ADSP-21990BBC bảng dữ liệu(HTML) 32 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

bảng dữ liệu tải về

Link URL